I applied through the online Qualcomm career portal and received an email two weeks later from HR, stating that a staff engineer would call me for a phone technical interview.
The phone interview was based on my resume and included many basic SystemVerilog (writing assertions and constraints for different stimuli), Verilog, and digital logic design questions.
A week later, I received another email saying I was selected for an onsite interview, scheduled two weeks later.
At the onsite, I had six one-on-one interviews with staff engineers, each lasting 45-60 minutes. They said the results would be emailed two weeks later.
The following metrics were computed from 4 interview experiences for the Qualcomm Design Verification Engineer role in San Diego, California.
Qualcomm's interview process for their Design Verification Engineer roles in San Diego, California is very selective, failing most engineers who go through it.
Candidates reported having very good feelings for Qualcomm's Design Verification Engineer interview process in San Diego, California.