Qualcomm visited my university to recruit for two roles: Hardware and Software. I applied for the Hardware role.

The hiring process consisted of one online test and two interview rounds.

The first round, the online test, comprised three sections, with 20 questions in each section and 30 minutes allocated per section. Candidates could navigate freely within each section. The marking scheme was +1 for a correct answer and -0.25 for a wrong answer.

The second round was a technical interview that lasted approximately 50 minutes. It was conducted online via Microsoft Teams and covered a wide range of topics, primarily related to CMOS, Digital Electronics, and Verilog.

The third round was also primarily a technical interview, with some discussion about location preferences. This interview was also conducted online on Microsoft Teams on the same day as the second interview and lasted about 35-40 minutes.

After the second interview round, there was no further HR round for any applicants. On the same day, the final results of the process were announced. In total, 8 people were selected for internships and full-time offers: 4 for Hardware and 4 for Software.

Round 1

• Section 1 – Aptitude and logical reasoning questions with some basic math. • Section 2 – C language-based coding MCQs, including pointers, arrays, etc., and general number system questions. • Section 3 – Digital electronics section with questions from combinational and sequential circuits, Boolean algebra, CMOS, BJT, ADC and DAC, etc.

Round 2

• A few questions about my resume. • Draw transfer characteristics of an inverter. • What is the threshold voltage of an inverter? • What are high and low noise margins? What do they signify? • Draw a CMOS inverter and mark all four terminals. • Draw a physical diagram of an NMOS. • What happens if the body is not shorted to the source? What might happen if it is connected to a higher voltage than the source? • What are state machines? • Write the Verilog code for a mod-3 counter. • What are common mistakes one can make while writing this Verilog code? • How would you make an AND gate with a 2x1 MUX? • How would you make an OR gate with an XOR gate?

Round 3

• Asked a few general personal questions about me and my resume. • A logical aptitude-based question: If you have two cubes with six surfaces each, how will you represent any day of a month from 01 to 31 using the two cubes by writing a single digit number on each side of both cubes? • Implement an OR gate using NAND gates. • Draw an OR gate using a 2x1 MUX. • What is the equation of an EXOR gate? • Draw a NAND gate using CMOS logic. • Explain how it functions. • What are setup time and hold time? • What are the different types of finite state machines? What is the difference? • Draw the state diagram of a sequence detector to detect – 0100101 – where 1* means that 1 can be repeated any number of times, and similarly for 0*. • Verbally explain how you would write Verilog code for a finite state machine. • Discussions regarding job location.