Good work-life balance here.
Less growing opportunity in the company
It was a good experience overall. They asked about various concepts in UVM and SystemVerilog, mainly concentrating on UVM. Topics covered included interfaces, modports, driver-sequencer communication, and more. I was also asked about design concepts
I was interviewed online with two technical rounds, one managerial round, and one HR round. It was a great experience, and HR was very helpful in carrying out a smooth recruitment process.
The interview process took around two days to complete. It was a difficult interview, with too many rounds and quality questions, mostly related to operating systems, advanced Python, and computer architecture. There were also a couple of rounds with
It was a good experience overall. They asked about various concepts in UVM and SystemVerilog, mainly concentrating on UVM. Topics covered included interfaces, modports, driver-sequencer communication, and more. I was also asked about design concepts
I was interviewed online with two technical rounds, one managerial round, and one HR round. It was a great experience, and HR was very helpful in carrying out a smooth recruitment process.
The interview process took around two days to complete. It was a difficult interview, with too many rounds and quality questions, mostly related to operating systems, advanced Python, and computer architecture. There were also a couple of rounds with