The process was straightforward and direct. If you knew the answer, great. If you did not know the answer, you could move on. The engineer was friendly and answered any questions I had.
This was an entry-level position. Basic questions were asked about FIFOs and metastability.
Then, I was asked to code an RTL design for an Ethernet cable. I had to dissect packets of data and extract the payload while discarding everything else.
The following metrics were computed from 1 interview experience for the SpaceX FPGA Verification Engineer role in United States.
SpaceX's interview process for their FPGA Verification Engineer roles in the United States is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for SpaceX's FPGA Verification Engineer interview process in United States.