SoC Physical Design Engineer, PnR
Description For SoC Physical Design Engineer, PnR
Apple is seeking a talented SoC Physical Design Engineer to join their Hardware team in delivering groundbreaking products. This role offers an exciting opportunity to work at the forefront of hardware innovation, where new ideas rapidly transform into extraordinary products.
The position involves direct responsibility for the physical implementation of design partitions, from netlist to tapeout, for highly complex SOC utilizing innovative process technology. You'll be working with cutting-edge hardware designs and be part of a team that has consistently reinvented entire industries.
As a SoC Physical Design Engineer, you'll collaborate closely with logic design teams, driving physical aspects of partition architecture early in the design cycle. Your expertise will be crucial in completing netlist to GDS2 implementation, ensuring all schedule and design goals are met. The role demands strong technical skills in timing, physical and electrical verification, as well as the ability to drive signoff closure for partitions.
The position offers a competitive compensation package, including a base salary range of $175,800 to $312,200, plus additional benefits such as stock options, comprehensive medical coverage, and educational support. You'll be working in Sunnyvale, California, at the heart of Silicon Valley, where you'll have the opportunity to contribute to products that impact millions of users worldwide.
The ideal candidate brings 10+ years of relevant industry experience, with deep knowledge of partition level P&R implementation, physical design construction, and analysis flows. Experience with large SOC designs exceeding 20M gates and frequencies over 1GHZ is highly valued. This role offers the perfect blend of technical challenges, innovation opportunities, and the chance to work with world-class teams in shaping the future of technology.
Responsibilities For SoC Physical Design Engineer, PnR
- Work with logic design team to understand partition architecture and drive physical aspects early in design cycle
- Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals
- Timing, physical and electrical verification, and driving signoff closure for partitions
- Resolve and improve design and flow issues related to physical design
- Drive optimization of PnR partitions to achieve best Power/Performance/Area
Requirements For SoC Physical Design Engineer, PnR
- BS and 10+ years of relevant industry experience
- Experience with partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification
- Experience with physical design construction and analysis flows and methodology
- MS in Electrical/Electronics/Computer Engineering or related field (preferred)
- Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ
- Strong communication skills
Benefits For SoC Physical Design Engineer, PnR
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Discretionary restricted stock unit awards
- Employee Stock Purchase Plan with discount
- Educational expense reimbursement
- Discretionary bonuses
- Relocation benefits
