As a SoC Power Model Engineer at Apple, you'll be part of the Digital Design Engineering group, responsible for designing state-of-the-art ASICs. In this highly visible role, you'll drive SOC power modeling and optimization for very power-efficient products. You'll collaborate with architects to determine interesting use-cases for simulation, create test cases, develop IP power models, and work with cross-functional teams to improve power efficiency.
Key responsibilities include:
- Providing power projections for future projects based on analysis
- Creating test cases within the design verification team's environment
- Developing IP power models for new architecture designs
- Working with architecture, RTL, and physical design teams on improving power efficiency
- Understanding product interactions at the software and system level that impact power
You'll be at the center of SOC design efforts, collaborating with all disciplines and playing a strategic role in getting functional products to millions of customers quickly. This role offers the opportunity to integrate new ideas and work with a team of talented engineers.
Qualifications:
- BS degree with a minimum of 3 years of relevant industry experience
- Experience in SOC power simulation and modeling, hardware power simulation, and analysis flow
- Familiarity with ASIC power analysis and optimization
- Knowledge of Verilog and System Verilog
- Scripting skills in Python, Perl, or Tcl
- Experience with SOC power modeling, low power design, and power optimization
- Understanding of power impact at architecture, logic design, and circuit levels
- Familiarity with SOC design flow and methodology
- Strong communication skills
Additional beneficial skills:
- Familiarity with multimedia data processing
- Silicon power measurement experience
Join Apple's Hardware team and contribute to groundbreaking technology that shapes the future of computing and user experiences.