STA Synthesis Engineer

Apple is a technology company known for reinventing entire industries with innovative hardware products and a commitment to leaving the world better than they found it.
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Senior Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Consumer · Enterprise SaaS

Description For STA Synthesis Engineer

Imagine what you could do here. At Apple, great ideas have a way of becoming great products and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices — strengthening our commitment to leave the world better than we found it.

In this highly visible role as an STA Synthesis Engineer, you will:

  • Excel at optimizing designs to reach groundbreaking power, area, and timing goals.
  • Deliver timing clean, logically equivalent netlists to the physical design team.
  • Collaborate with a variety of functional teams to continually question the limitations of technology.

You'll be part of Apple's world-class chip team, driven by top-notch engineers. This role offers the opportunity to contribute to the next groundbreaking Apple products, working on SOCs for various products at a rigorous pace.

Key responsibilities and qualifications include:

  • Expertise in STA (static timing analysis), Verilog/VHDL, and Synthesis
  • Deep understanding of physical design concepts/constraints: floor-planning, placement, congestion, and setup/hold timing closure
  • Ability to optimize designs for best-in-class low power and high performance with logically equivalent RTL transforms
  • Experience with ECO implementation, both functional and timing closure
  • Familiarity with simulation, debugging tools, and working closely with DV team
  • Experience with multi-clock and multi-power domain designs
  • Familiarity with DFT insertion and multi-mode timing constraints
  • Strong collaboration skills and effective written/verbal communication
  • Passion for innovation and embracing technical challenges

Join Apple's Hardware team and be part of creating the next generation of cutting-edge technology products.

Last updated a month ago

Responsibilities For STA Synthesis Engineer

  • Optimize designs to reach groundbreaking power, area, and timing goals
  • Deliver timing clean, logically equivalent netlists to physical design team
  • Collaborate with various functional teams
  • Optimize designs for best-in-class low power and high performance
  • Work closely with DV team

Requirements For STA Synthesis Engineer

  • Bachelor's Degree + 3 Years of Experience
  • Expertise in STA (static timing analysis), Verilog/VHDL, and Synthesis
  • Deep understanding of physical design concepts/constraints
  • Experience with ECO implementation
  • Familiarity with simulation and debugging tools
  • Experience with multi-clock and multi-power domain designs
  • Familiarity with DFT insertion and multi-mode timing constraints

Interested in this job?

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