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ASIC DFT Engineer, Silicon

Google is a global technology company that organizes the world's information and makes it universally accessible and useful.
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Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
Hardware

Description For ASIC DFT Engineer, Silicon

Google's Devices & Services team is seeking an ASIC DFT Engineer to join their Silicon team in Bengaluru. This role is part of a team that pushes boundaries in developing custom silicon solutions that power Google's direct-to-consumer products. The position combines hardware expertise with software development, focusing on Design for Testing (DFT) methodologies and implementations.

The role involves working closely with RTL and Physical Designer Engineers to develop and implement testing solutions for complex silicon designs. You'll be responsible for architecting and developing DFT flows, working with various testing methodologies including ATPG, BIST, and JTAG, and creating automated testing solutions.

As part of Google's mission to organize the world's information and make it universally accessible, you'll contribute to the innovation behind products used by millions worldwide. The Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users.

The ideal candidate will have strong technical skills in hardware design and testing, experience with EDA tools, and excellent programming abilities in languages like Python and TCL. You'll need to collaborate effectively with cross-functional teams and contribute to the development of next-generation hardware experiences that deliver unparalleled performance, efficiency, and integration.

This is an excellent opportunity for someone passionate about hardware design and testing, who wants to work on cutting-edge technology at one of the world's leading tech companies. The role offers the chance to impact millions of users while working with state-of-the-art tools and technologies in silicon design and testing.

Last updated 6 days ago

Responsibilities For ASIC DFT Engineer, Silicon

  • Work on Subsystem level DFT scan, Memory Built-In Self Test (MBIST) architecture with multiple voltage, power domains
  • Write basic scripts to automate the DFT flow
  • Develop tests that can be used for production in the Automatic Test Equipment (ATE) flow

Requirements For ASIC DFT Engineer, Silicon

Python
  • Bachelor's degree in Electrical or Electronics Engineering, or equivalent practical experience
  • 3 years of experience in DFT methodologies
  • Experience with DFT Electronic Design Automation (EDA) tools like Tessent
  • Experience with Automatic Test Pattern Generation (ATPG), Low Power designs, Built-In Self Test (BIST), Joint Test Action Group (JTAG), Internal Joint Test Action Group (IJTAG) tools and flow
  • Experience architecting/developing DFT flows and methodologies
  • Experience in collaborating with Design, Physical Design (PD) and Static Timing Analysis (STA) teams
  • Excellent scripting skills in languages like Python and TCL

Benefits For ASIC DFT Engineer, Silicon

Medical Insurance
Dental Insurance
Vision Insurance
401k
Parental Leave
  • Comprehensive health benefits
  • Retirement plans
  • Parental leave

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