As a CAD/EDA/Methodology Engineer at Google Cloud TPU, you will be part of a diverse team developing custom silicon solutions for AI/ML hardware acceleration. You'll work on cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. Your responsibilities include designing new RTL and design verification methodologies, identifying inefficiencies in the front-end chip implementation process, and working with cross-functional teams globally to drive changes.
You'll be involved in planning and executing work in an innovative and fast-paced environment, focusing on providing cutting-edge flow and methodology solutions for high-performance IP development. Collaboration with architects, logic designers, and verification engineers is key to developing flows for building and verifying complex IPs and subsystems.
This role offers the opportunity to shape the future of AI/ML hardware acceleration and contribute to products used by millions worldwide. You'll leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Google's Technical Infrastructure team is proud to be the engineers' engineers, building and maintaining the architecture that keeps Google's product portfolio running. From developing and maintaining data centers to building the next generation of Google platforms, you'll be at the forefront of innovation in the field.
Join Google to push boundaries, develop custom silicon solutions, and be part of the team that powers the future of Google's TPU technology.