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SoC DFT Engineer, Google Cloud

A global technology company that designs, implements, and manages hardware, software, machine learning, and systems infrastructure for Google services and Google Cloud.
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Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Enterprise SaaS
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Description For SoC DFT Engineer, Google Cloud

Google Cloud is seeking a System on a Chip (SoC) Design for Test (DFT) Engineer to join their ML, Systems, & Cloud AI organization. This role is crucial in defining, implementing, and deploying advanced DFT methodologies for digital or mixed-signal chips. The position involves working on custom silicon solutions that power Google's direct-to-consumer products, contributing to hardware innovations used by millions worldwide.

The role requires expertise in silicon test strategies, DFT architecture, and creating DFT specifications for next-generation SoCs. You'll be responsible for designing, inserting, and verifying DFT logic, as well as collaborating with test engineers for post-silicon work and debugging. This position is part of Google's broader initiative in shaping the future of hyperscale computing.

The ML, Systems, & Cloud AI organization is responsible for the hardware, software, machine learning, and systems infrastructure supporting all Google services and Google Cloud. The team's work impacts billions of users worldwide, with projects ranging from TPU development to managing global networks. Security, efficiency, and reliability are top priorities, and the team plays a crucial role in developing cutting-edge technologies like Google Cloud's Vertex AI platform.

This is an excellent opportunity for someone passionate about hardware engineering and test methodologies to work on innovative projects at scale. The role offers the chance to work with advanced technologies and contribute to products that have a global impact, while being part of a team that prioritizes technical excellence and innovation.

Last updated 2 months ago

Responsibilities For SoC DFT Engineer, Google Cloud

  • Develop DFT strategy and architecture (e.g., Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG), hierarchical DFT)
  • Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality
  • Insert DFT logic, boundary scan, scan chains, DFT Compression, Logic Built-In Self Test, Test Access Point (TAP) controller, clock control block, and other DFT IP blocks
  • Insert and hook up MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces
  • Document DFT architecture, test sequences, and boot-up sequences associated with test pins

Requirements For SoC DFT Engineer, Google Cloud

  • Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience
  • 3 years of experience with Design For Test (DFT) methodologies, DFT verification, and industry-standard DFT tools
  • Experience with ASIC DFT synthesis, simulation, and verification flow
  • Experience in DFT specification, definition, architecture, and insertion