FPGA Verification VHDL/Verilog Engineer - Lead Software Engineer
Description For FPGA Verification VHDL/Verilog Engineer - Lead Software Engineer
JPMorgan Chase is seeking a Lead Software Engineer specializing in FPGA Verification within the Commercial and Investment Bank's Electronic Trading Technology team. This role is part of the Jisu team in Electronic Trading Technology, focusing on ultra-low latency direct market access solutions.
As a Lead Software Engineer, you'll be an integral part of an agile team working to enhance, build, and deliver trusted market-leading technology products in a secure, stable, and scalable way. The position involves developing complex FPGA verification solutions for equities trading, with emphasis on modeling expected hardware behavior and ensuring high-quality, low-latency implementations.
The role combines deep technical expertise in FPGA verification with leadership responsibilities. You'll work with VHDL/Verilog, develop verification strategies, and collaborate with global team members across New York, London, Athens, Hong Kong, Tokyo, and Mumbai. The team has developed in-house ultra-low latency connectivity and risk management applications and is expanding beyond equities to support markets for other asset classes.
Key technical requirements include strong knowledge of FPGA architecture design, experience with Python co-simulation and C++, proficiency in verification strategies, and expertise with tools like Modelsim/Questasim. You'll need to understand networking protocols and work effectively in a Unix/Linux environment.
JPMorgan Chase offers a competitive compensation package including base salary ($152,000-$215,000), potential for commission-based pay, and comprehensive benefits including healthcare, retirement savings, tuition reimbursement, and mental health support. The company values diversity and inclusion, making it an excellent opportunity for experienced FPGA verification engineers looking to impact global financial markets.
Responsibilities For FPGA Verification VHDL/Verilog Engineer - Lead Software Engineer
- Executes creative software solutions, design, development, and technical troubleshooting
- Develops secure high-quality production code, and reviews and debugs code
- Develops complex FPGA verification solutions for equities trading
- Collaborate with users and external vendors to gather requirements
- Partner with internal teams to deliver reliable and low-latency solutions
- Identifies opportunities to eliminate or automate remediation of recurring issues
- Leads evaluation sessions with external vendors and internal teams
- Leads communities of practice across Software Engineering
Requirements For FPGA Verification VHDL/Verilog Engineer - Lead Software Engineer
- Formal training or certification on software engineering concepts and 5+ years applied experience
- Advanced in Python co-simulation, C++
- Strong knowledge of FPGA architecture design in VHDL/Verilog
- Experience in developing verification strategies and writing complex test benches
- Strong understanding of software and hardware interaction
- Proficient scripting skills to automate development and testing tasks
- Experience with complex system-level simulation using Modelsim/Questasim
- Working knowledge of networking protocols, including Ethernet/10G and TCP/IP
- Experience in a Unix/Linux-based development environment
- Excellent interpersonal and communication skills
Benefits For FPGA Verification VHDL/Verilog Engineer - Lead Software Engineer
- Base salary
- Commission-based pay
- Discretionary incentive compensation
- Comprehensive health care coverage
- On-site health and wellness centers
- Retirement savings plan
- Backup childcare
- Tuition reimbursement
- Mental health support
- Financial coaching
