Senior ASIC Engineer - PMU

NVIDIA is seeking a Senior ASIC Engineer to work on their Power Management Unit (PMU) team, focusing on optimizing chip performance and efficiency for AI datacenter applications. The role involves working with a critical IP that has been developed over 13 years, consisting of a RISC-V core and custom-designed control logic. The PMU is essential for collecting and processing data across the entire chip to determine optimal operating points.

The position requires collaboration with software and architecture teams to design and implement power features, working with RTL design and silicon debug. The ideal candidate will have a strong background in electrical or computer engineering, with experience in ASIC design and power management systems.

This is an opportunity to work at NVIDIA, the world leader in accelerated computing, where you'll be contributing to solutions that tackle significant challenges in AI and digital twins, transforming major industries. The role offers hands-on experience with cutting-edge technology and the chance to work with teams across multiple locations including the USA and India.

The position is based in Shanghai, China, and requires strong communication skills including proficient English. This is an excellent opportunity for someone with experience in active power/low power design or system-level control features to make a significant impact on next-generation chip development.