Senior ASIC Verification Engineer, Coherent High Speed Interconnect
Job Description
NVIDIA, a pioneer in visual computing and GPU technology, is seeking a Senior ASIC Verification Engineer to join their team working on coherent high-speed interconnects for mobile SoCs and GPUs. This role sits at the intersection of NVIDIA's cutting-edge work in AI computing, GPU deep learning, and hardware innovation. The position offers the opportunity to work on products ranging from consumer graphics to self-driving cars and artificial intelligence applications.
As a Senior ASIC Verification Engineer, you'll be responsible for verifying complex high-speed coherent interconnect designs, developing sophisticated verification methodologies, and ensuring the quality of NVIDIA's innovative hardware solutions. You'll work with state-of-the-art verification tools and methodologies, collaborating with a global team of experts in architecture, design, and silicon verification.
The ideal candidate brings strong technical expertise in verification methodologies, System Verilog, and UVM, combined with experience in high-speed interconnect protocols. You'll have the opportunity to mentor junior engineers while working on challenging technical problems that directly impact NVIDIA's next-generation products.
NVIDIA offers a competitive compensation package and the chance to work with some of the industry's brightest minds. The company's commitment to innovation extends from gaming and professional visualization to data centers, autonomous vehicles, and AI computing. This role provides relocation and immigration support, making it an excellent opportunity for international candidates looking to join a leader in the semiconductor industry.
Responsibilities For Senior ASIC Verification Engineer, Coherent High Speed Interconnect
- Verify high-speed coherent interconnect design, architecture, golden models, and micro-architecture
- Develop verification infrastructure (Testbenches, BFMs, Checkers, Monitors)
- Define verification scope and complete test/coverage plans
- Collaborate with architects, designers, emulation, and silicon verification teams
Requirements For Senior ASIC Verification Engineer, Coherent High Speed Interconnect
- Bachelor's or Master's Degree with 5+ years of relevant verification experience
- Experience in architecting test bench environments for unit level verification
- Background in verification using random stimulus with functional coverage
- Knowledge of industry standard interconnect protocols (PCIE, CXL, CHI)
- Strong background in SV and UVM methodology
- C++ programming language experience and System Verilog expertise
- Experience with design and verification tools (VCS, Debussy, GDB)
- Strong debugging and analytical skills
- Strong communication and interpersonal skills
Benefits For Senior ASIC Verification Engineer, Coherent High Speed Interconnect
- Relocation Benefits
- Visa Sponsorship
