DFT Engineer - CPU

Qualcomm, a leading technology innovator, is seeking a DFT Engineer for their CPU team in Santa Clara. This role represents an exciting opportunity to work on groundbreaking chip architecture implementation from the ground up.

The position involves collaborating with chip architects, designers, implementation engineers, and test engineers to verify DFT and DFD architecture, implementation, and test plans for both mixed signal and digital VLSI designs. You'll have the unique opportunity to influence new design architecture while working with cutting-edge technology.

The ideal candidate will bring strong expertise in digital ASIC design, particularly with Verilog or VHDL, and substantial experience in test or DFT (6+ years). Knowledge of Mentor Tessent tools and proficiency in programming languages like TCL, Perl/Python, and Shell scripting is essential. The role requires hands-on experience with commercial test generation tools and a deep understanding of DFT techniques including JTAG, ATPG, and various testing methodologies.

Qualcomm offers a highly competitive compensation package, with a salary range of $167,100 to $250,700, plus additional benefits including annual bonuses, RSU grants, and comprehensive healthcare coverage. The company's culture promotes innovation, collaboration, and professional growth, making it an ideal environment for engineers looking to push the boundaries of technology.

The position offers significant growth potential within a company that's at the forefront of technological innovation. You'll be working in Santa Clara, a hub of technological advancement, with access to state-of-the-art resources and some of the brightest minds in the industry. This role is perfect for someone who is passionate about chip design, enjoys solving complex technical challenges, and wants to contribute to next-generation technology development.