Design Verification Engineer Interview Experience - Sunnyvale, California
Process
The phone interview had basic questions about computer architecture and object-oriented concepts.
The onsite interview consisted of 6 technical rounds plus 1 HR interview. Questions focused mainly on computer architecture, cache coherency, and pipelining techniques. There were also a few questions on Verilog, SystemVerilog, Perl, and assembly language.
Questions
How would you verify a write-back 4-way set associative cache using assembly language programming?
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Interview Statistics
The following metrics were computed from 1 interview experience for the AMD Design Verification Engineer role in Sunnyvale, California.
Success Rate
AMD's interview process for their Design Verification Engineer roles in Sunnyvale, California is extremely selective, failing the vast majority of engineers.
Experience Rating
Candidates reported having very good feelings for AMD's Design Verification Engineer interview process in Sunnyvale, California.
AMD Work Experiences
- 5.0Good Balance, Slow GrowthDesign Verification Engineer • Current EmployeeSanta Clara, California, United StatesNovember 20, 2024Pros: Good work-life balance.Cons: Career growth might be a challenge.
- 3.0Nice people, boring officeDesign Verification Engineer • Former EmployeeMarkham, Ontario, CanadaJune 21, 2024Pros: The team was very friendly and welcoming. You get your own cubicle and get to see all your colleagues often.Cons: The office doesn’t have much, and the location is poor.
- 5.0Great Pay, No ComplaintsDesign Verification Engineer • Former EmployeeSingapore, SingaporeAugust 24, 2023Pros: Good compensation and stock optionsCons: I don’t have any cons to mention.
AMD Interview Questions
