I was applying for a co-op in a presilicon verification group.
After the greeting, we started directly on the technical questions. I was able to answer most of them. The questions were mostly related to computer architecture and Verilog, like cache questions.
After the technical questions, we went through my resume and asked questions about my research and work experiences.
At the end, I asked several questions about the project they are working on.
What is the disadvantage of having a cache with more associativity?
The following metrics were computed from 1 interview experience for the AMD Verification Engineer role in Fort Collins, Colorado.
AMD's interview process for their Verification Engineer roles in Fort Collins, Colorado is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for AMD's Verification Engineer interview process in Fort Collins, Colorado.