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Verification Engineer Interview Experience - Cupertino, California

April 1, 2014
Positive ExperienceNo Offer

Process

For the GPU team:

I was contacted by HR, followed by two phone screens.

First screen: Manager

  • General questions from resume, experience, various verification environments, SV constraint solver.
  • Functional coverage.

Second screen: Team member

  • UVM questions: TLM? Phases? Build is top-down?
  • Coverage?
  • GPU pipeline overview.
  • How the scoreboard was implemented.
  • UVM monitors.
  • UVM TLM FIFO implementation.
  • SV knowledge?

I performed very well in both interviews, but management chose to hire an internal candidate who had better experience.

Questions

Is the run phase top-down or bottom-up?

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Apple Verification Engineer role in Cupertino, California.

Success Rate

0%
Pass Rate

Apple's interview process for their Verification Engineer roles in Cupertino, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive50%
Neutral50%
Negative0%

Candidates reported having very good feelings for Apple's Verification Engineer interview process in Cupertino, California.

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