Met with a recruiter, then three hiring managers and four engineers, as well as a director.
Questions covered SystemVerilog, C, and previous job-related topics.
Be prepared to explain some details based on what you have done.
Overall, the interview matched the job description; there were no surprises.
SV array size, array min, coding generator. C bit shifting.
The following metrics were computed from 1 interview experience for the Broadcom Senior Staff Verification Engineer role in Santa Clara, California.
Broadcom's interview process for their Senior Staff Verification Engineer roles in Santa Clara, California is incredibly easy as the vast majority of engineers get an offer after going through it.
Candidates reported having very good feelings for Broadcom's Senior Staff Verification Engineer interview process in Santa Clara, California.