The process was a first round written test followed by 2 technical rounds.
The first round consisted of various digital concepts like latches, ff, mux, blocking and non blocking assignments, and intra and inter delays.
The second round consisted of questions on counters and a Verilog code to swap the registers.
Functional, code coverage,priority encoder explanation, SV
The following metrics were computed from 1 interview experience for the Cadence Design Systems ASIC Design and Verification Engineer role in Bengaluru, India.
Cadence Design Systems's interview process for their ASIC Design and Verification Engineer roles in Bengaluru, India is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Cadence Design Systems's ASIC Design and Verification Engineer interview process in Bengaluru, India.