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Verification Engineer Interview Experience - New Delhi, India

April 1, 2025
Negative ExperienceNo Offer

Process

Due to health issues, I was unwell during my scheduled interview and attempted to reschedule by reaching out to the HR contact I had. Unfortunately, I didn't receive a timely response and had to proceed with the interview while running a high fever. The panel showed little empathy, and the interaction lacked basic introductions or professionalism.

Despite being asked moderate, relevant questions, I couldn’t perform at my best due to my condition and was later informed that the interview would not be rescheduled as the panel had decided to reject my profile.

Questions

About scripting language Python regex

Basic digital circuits Counters and flip flops

Factory overriding methods in UVM

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Interview Statistics

The following metrics were computed from 2 interview experiences for the Cadence Design Systems Verification Engineer role in New Delhi, India.

Success Rate

50%
Pass Rate

Cadence Design Systems's interview process for their Verification Engineer roles in New Delhi, India is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive50%
Neutral0%
Negative50%

Candidates reported having mixed feelings for Cadence Design Systems's Verification Engineer interview process in New Delhi, India.

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