It was average 1 interviewer, 7 or 8 panels. Interviewer was friendly and asked what activities did I participate in college. He then asked to write the code to implement a sequence detector and then asked a question about circuit theory.
This is related to digital electronics basics.
The following metrics were computed from 2 interview experiences for the Cadence Design Systems Verification Engineer role in New Delhi, India.
Cadence Design Systems's interview process for their Verification Engineer roles in New Delhi, India is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having mixed feelings for Cadence Design Systems's Verification Engineer interview process in New Delhi, India.