There were five rounds of interview.
System Verilog, UVM, assertion, previous work, problem solving, puzzles, etc.,
The following metrics were computed from 3 interview experiences for the Cadence Design Systems Verification Engineer role in Pune, India.
Cadence Design Systems's interview process for their Verification Engineer roles in Pune, India is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having mixed feelings for Cadence Design Systems's Verification Engineer interview process in Pune, India.