Ok
Ok
The salary is on par with the industry.
There was poor work-life balance and management.
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Cadence Design Systems Interview Experiences
Applications Engineer
4 rounds of interviews and 3 technical and 1 HR and was asked about VLSI Core concepts, STA, Communication and EMF. Digital design basics and physical design and network analysis.
Applications Engineer
They showed PPT on STA. After online test, 25 ppl were shortlisted. There were 3 rounds of interview. Round 1 was to test the basics of digital electronics, CMOS VLSI design, DSA. Round 2 was resume based. Round 3 was HR round.
Applications Engineer
Basically interview consists of 3 rounds. It was through referral so I got a call from the Team1. Technical interview They started with M-Tech projects related to VLSI then with basics of analog and digital like MOSFET operations, body effec
Applications Engineer
Bengaluru, IndiaAugust 26, 20254 rounds of interviews and 3 technical and 1 HR and was asked about VLSI Core concepts, STA, Communication and EMF. Digital design basics and physical design and network analysis.
Applications Engineer
Bengaluru, IndiaAugust 26, 2025They showed PPT on STA. After online test, 25 ppl were shortlisted. There were 3 rounds of interview. Round 1 was to test the basics of digital electronics, CMOS VLSI design, DSA. Round 2 was resume based. Round 3 was HR round.
Applications Engineer
Bengaluru, IndiaNovember 26, 2022Basically interview consists of 3 rounds. It was through referral so I got a call from the Team1. Technical interview They started with M-Tech projects related to VLSI then with basics of analog and digital like MOSFET operations, body effec
