I interned in San Jose, USA, as an ASIC DFT Intern from June to August 2024. My mentor, team leader, and team members were super helpful throughout.
They provided hands-on guidance in MBIST memory validation and On-Chip Clock Controller (OCC) testing, helping me gain practical experience.
My mentor was incredibly patient, explaining complex DFT architectures in ASIC designs.
The internship was short (only three months), so there wasn't enough time to dive deeper into some advanced projects. Also, the workload could get intense during simulation debugging sessions, leading to occasional long hours.
Hiring manager called, and did phone interview and went for 5 rounds of 1-1 interview.
Applied online and received a call from HR. The phone screen included questions about my resume. I was asked to explain what I did in a project and answer questions about it. - Difference between a latch and a flip-flop - Pass gate - Gated clock and
I was reached out to through LinkedIn. The interview was set up for the following week. There were six rounds of interviews, each lasting an hour. They asked questions ranging from previous experience and current work to algorithms, TDD, and whitebo
Hiring manager called, and did phone interview and went for 5 rounds of 1-1 interview.
Applied online and received a call from HR. The phone screen included questions about my resume. I was asked to explain what I did in a project and answer questions about it. - Difference between a latch and a flip-flop - Pass gate - Gated clock and
I was reached out to through LinkedIn. The interview was set up for the following week. There were six rounds of interviews, each lasting an hour. They asked questions ranging from previous experience and current work to algorithms, TDD, and whitebo