F2F. Came for an internship in college. The students who were having a pointer more than 8 were only eligible.
It was a good experience.
They were asking questions on every subject: RTL Verification, CMOS, Timing.
Mainly focused on low power, as I said I am interested in low power. Asked about timing analysis, STA setup/hold, and synthesis. Some basic RTL design with Verilog and VHDL.
Basic CMOS modeling of NAND and NOR gates.
In the HR round, as I had failed in one of the subjects, I was asked about that subject. However, as I performed well, they considered that.
The following metrics were computed from 1 interview experience for the Intel ASIC Design Engineer role in Ahmedabad, Gujarat.
Intel's interview process for their ASIC Design Engineer roles in Ahmedabad, Gujarat is incredibly easy as the vast majority of engineers get an offer after going through it.
Candidates reported having very good feelings for Intel's ASIC Design Engineer interview process in Ahmedabad, Gujarat.