ASIC Design Engineer Interview Experience - Hillsboro, Oregon
May 1, 2012
Neutral ExperienceNo Offer
Process
45-minute phone interview, followed by a 5-hour on-site interview.
Questions
List all possible ways to minimize the power dissipation of an ASIC chip.
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Interview Statistics
The following metrics were computed from 3 interview experiences for the Intel ASIC Design Engineer role in Hillsboro, Oregon.
Success Rate
0%
Pass Rate
Intel's interview process for their ASIC Design Engineer roles in Hillsboro, Oregon is extremely selective, failing the vast majority of engineers.
Experience Rating
Positive33%
Neutral67%
Negative0%
Candidates reported having very good feelings for Intel's ASIC Design Engineer interview process in Hillsboro, Oregon.
Intel Work Experiences
4.0
Good Place to Work
ASIC Design Engineer • Current Employee
Haifa, Israel
May 15, 2021
Pros: Good well-being, good colleges, relationships, and a lot of consideration for the workers from the management.
Cons: Can improve its talent acquisition.
3.0
Good Balance, Steep Learning Curve
ASIC Design Engineer • Former Employee
Toronto, Ontario, Canada
May 9, 2025
Pros: Good work-life balance always.
Cons: I need more time to get used to it.
3.0
It is ok
ASIC Design Engineer • Current Employee
Haifa, Israel
August 10, 2025
Pros: Food
Gym
Coffee
Nice coworkers
Cons: Low salary compared to other companies in the industry
- 4.0Good Place to WorkASIC Design Engineer • Current EmployeeHaifa, IsraelMay 15, 2021Pros: Good well-being, good colleges, relationships, and a lot of consideration for the workers from the management.Cons: Can improve its talent acquisition.
- 3.0Good Balance, Steep Learning CurveASIC Design Engineer • Former EmployeeToronto, Ontario, CanadaMay 9, 2025Pros: Good work-life balance always.Cons: I need more time to get used to it.
- 3.0It is okASIC Design Engineer • Current EmployeeHaifa, IsraelAugust 10, 2025Pros: Food Gym Coffee Nice coworkersCons: Low salary compared to other companies in the industry
Intel Interview Questions
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