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ASIC Design Engineer Interview Experience - Hillsboro, Oregon

March 1, 2012
Neutral ExperienceNo Offer

Process

Applied online.

Had a 1:1 phone interview.

General questions were asked, not technical details.

Questions

What did I do?

Memory controller design.

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Interview Statistics

The following metrics were computed from 3 interview experiences for the Intel ASIC Design Engineer role in Hillsboro, Oregon.

Success Rate

0%
Pass Rate

Intel's interview process for their ASIC Design Engineer roles in Hillsboro, Oregon is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive33%
Neutral67%
Negative0%

Candidates reported having very good feelings for Intel's ASIC Design Engineer interview process in Hillsboro, Oregon.

Intel Work Experiences