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CPU Design Verification Interview Experience - Santa Clara, California

February 1, 2016
Positive ExperienceGot Offer

Process

Telephonic interview: Interviewed over the phone. Focused on Cache Coherence, Computer Architecture, C programming, and related topics.

Then was flown in for an onsite interview in Santa Clara:

  • Total of 5 one-on-one interviews.
  • All but one interviewer appeared to be senior managers with great demeanor.
  • Interviewers were very calm and composed, and we had great discussions on my past projects and experience.
  • They presented many situational problems.

Overall, it was a very positive experience, and I thoroughly enjoyed the process. After the interviews, there were extensive discussions about Intel's current initiatives and industry challenges.

Questions

A lot about past experience and projects, Arbiter design, OOPS concepts, scripting, Verilog, Asynchronous/synchronous FIFO, Computer Architecture, and Verification concepts. However, most of it was focused on prior experience.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Intel CPU Design Verification role in Santa Clara, California.

Success Rate

0%
Pass Rate

Intel's interview process for their CPU Design Verification roles in Santa Clara, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Intel's CPU Design Verification interview process in Santa Clara, California.

Intel Work Experiences