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Verification Engineer Interview Experience - Portland, Oregon

March 1, 2016
Positive ExperienceGot Offer

Process

One round phone interview.

Four rounds of onsite interviews:

  • One round on Design (Computer Architecture)
  • Two rounds on Verification

Given Verilog code and asked how it would get synthesized.

Questions

Implement Linked List - Verification components in a testbench - Modify classic 5-stage pipeline to accommodate SMT

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Interview Statistics

The following metrics were computed from 1 interview experience for the Intel Verification Engineer role in Portland, Oregon.

Success Rate

100%
Pass Rate

Intel's interview process for their Verification Engineer roles in Portland, Oregon is incredibly easy as the vast majority of engineers get an offer after going through it.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Intel's Verification Engineer interview process in Portland, Oregon.

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