Great Balance, Bad Stock
Great Balance, Bad Stock
Good work-life balance here.
Bad stock, pay cut, no QPB.
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Intel Interview Questions
Intel Interview Experiences
Pre-Silicon Validation and Verification Engineer
The interview consisted of behavioral and technical portions. I didn't apply for this position initially, but after the interview, they asked me if I wanted to apply. The manager and engineers were nice and knowledgeable. The exciting part was tal
Pre-Silicon Validation and Verification Engineer
They didn't bother checking my qualifications and invited me for an interview for a position that was actually for PhD students, while I am an undergraduate student. Upon realizing this, the interviewer became very cold and started talking down to m
Pre-Silicon Validation and Verification Engineer
There are 2 rounds of technical interviews, each lasting 2 hours. Most of the questions they ask are from SystemVerilog (SV) and UVM, as well as from the project you are currently working on in your current organization.
Pre-Silicon Validation and Verification Engineer
United StatesNovember 1, 2015The interview consisted of behavioral and technical portions. I didn't apply for this position initially, but after the interview, they asked me if I wanted to apply. The manager and engineers were nice and knowledgeable. The exciting part was tal
Pre-Silicon Validation and Verification Engineer
United StatesDecember 23, 2020They didn't bother checking my qualifications and invited me for an interview for a position that was actually for PhD students, while I am an undergraduate student. Upon realizing this, the interviewer became very cold and started talking down to m
Pre-Silicon Validation and Verification Engineer
IndiaJanuary 7, 2021There are 2 rounds of technical interviews, each lasting 2 hours. Most of the questions they ask are from SystemVerilog (SV) and UVM, as well as from the project you are currently working on in your current organization.
