ASIC Design Engineer Interview Experience - Santa Clara, California
Process
One phone interview, asked about projects on the resume. Then asked about MESI protocol. Then onsite interview. There are 5 people. First one asked basic CPU questions, such as 5 stage pipelined CPU. Second one asked me about reorder buffer in the out of order processor and load store queue. Third one asked about waveform questions. The last two asked me about some Verilog questions.
Questions
The reorder buffer has a store pointer.
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Interview Statistics
The following metrics were computed from 16 interview experiences for the Marvell Technology ASIC Design Engineer role in Santa Clara, California.
Success Rate
Marvell Technology's interview process for their ASIC Design Engineer roles in Santa Clara, California is fairly selective, failing a large portion of engineers who go through it.
Experience Rating
Candidates reported having very good feelings for Marvell Technology's ASIC Design Engineer interview process in Santa Clara, California.
Marvell Technology Work Experiences
- 4.0ASIC Design EngineerASIC Design Engineer • Current EmployeeSanta Clara, CaliforniaNovember 2, 2014Pros: Food, environment, life work balanceCons: Salary, compensation, benefits, bonus, RSU, all are too low
- 5.0ASIC deisgn engineerASIC Design Engineer • Current EmployeeSanta Clara, CaliforniaNovember 16, 2014Pros: Learn all the tools, and free to try new tools. Best Chinese lunch in BayArea. Nice work - life balance if your group is not busy,Cons: Old working style. Old flow, don't want to change design. Work overnight is there is tapeout coming up. No working from home allowed in most of the group.
- 4.0Good Learning ExperienceASIC Design Engineer • Current EmployeeSanta Clara, CaliforniaMarch 21, 2013Pros: Very good learning experience, great campus & food. You get to work with the latest technical tools and projects. Can be a lot of work at times.Cons: Less interaction with manager, no one on one meetings
