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ASIC Design Engineer Interview Experience - Santa Clara, California

October 19, 2012
Negative ExperienceNo Offer

Process

Interview process was straightforward. Phone interview followed by onsite with 6 1:1 interviews.

All basic design question from VLSI, datapath design and bus architectures.

The interview went well, but they have a simple policy of not responding to any emails under any pretext. I am under the assumption that I was not selected due to their strong inkling to be completely ignorant to my emails.

At this point I have no regard for a company that treats candidates so poorly; it just shows the amount of respect (or lack of) that they have for people in general.

Questions

The process included standard design questions.

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Interview Statistics

The following metrics were computed from 16 interview experiences for the Marvell Technology ASIC Design Engineer role in Santa Clara, California.

Success Rate

31%
Pass Rate

Marvell Technology's interview process for their ASIC Design Engineer roles in Santa Clara, California is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive44%
Neutral38%
Negative19%

Candidates reported having very good feelings for Marvell Technology's ASIC Design Engineer interview process in Santa Clara, California.

Marvell Technology Work Experiences