I received a call for an onsite interview as I was in Santa Clara itself. I gave first onsite with 3 engineers. After 15-20 days I received call for another onsite with 4 engineers. The interviews were pretty basic stuff related to Verilog basics, FSM Design, FIFO related questions as well as on the resume.

After 2nd onsite I waited for 2 months but I did not get any reply from HR or recruiter. Finally when I contacted manager, I was told that they had already selected some other candidate. They seriously should learn some professionalism and have the courtesy to give an update to someone who gave 2 onsite interviews. Totally disappointed with the process speed as well communication.

The topics included Verilog tasks and functions, FSM design, FIFO depth, and some SystemVerilog questions.