ASIC Design Engineer Interview Experience - Santa Clara, California
Process
First of all, the recruiter just reach me through the email. And then we went through one-round technical phone interview, including asking me something about the ASIC flow, Verilog. About two weeks later, I got a notification that I passed the phone round, and we reserved a Skype interview including 4 rounds. 4 rounds include basic concepts and some Verilog coding.
Questions
Tell me something about the ASIC flow.
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Interview Statistics
The following metrics were computed from 16 interview experiences for the Marvell Technology ASIC Design Engineer role in Santa Clara, California.
Success Rate
Marvell Technology's interview process for their ASIC Design Engineer roles in Santa Clara, California is fairly selective, failing a large portion of engineers who go through it.
Experience Rating
Candidates reported having very good feelings for Marvell Technology's ASIC Design Engineer interview process in Santa Clara, California.
Marvell Technology Work Experiences
- 3.0Fast paced environmentASIC Design Engineer • Former EmployeeSanta Clara, CaliforniaApril 13, 2014Pros: Employees were expected to do more. It could benefit someone with a desire to know.Cons: Poor communication, most of the time it's one way. Schedules were tight and unrealistic.
- 5.0ASIC deisgn engineerASIC Design Engineer • Current EmployeeSanta Clara, CaliforniaNovember 16, 2014Pros: Learn all the tools, and free to try new tools. Best Chinese lunch in BayArea. Nice work - life balance if your group is not busy,Cons: Old working style. Old flow, don't want to change design. Work overnight is there is tapeout coming up. No working from home allowed in most of the group.
- 5.0reviewASIC Design Engineer • Former EmployeeSanta Clara, CaliforniaMarch 8, 2021Pros: It was a beautiful office and had good food.Cons: There is a lot of transition happening right now.
