ASIC Design Verification Engineer Interview Experience - India
Process
The interview process was flawless and easy.
The interview was arranged as per the mutual availability of the interviewer and the candidate, and feedback was also provided soon.
Whole process was completed within a week.
Questions
Current project architecture and role.
SV and UVM related.
SV constraint, coverage, assertions.
UVM architecture and flow.
Verification strategy related.
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Interview Statistics
The following metrics were computed from 1 interview experience for the Marvell Technology ASIC Design Verification Engineer role in India.
Success Rate
Marvell Technology's interview process for their ASIC Design Verification Engineer roles in India is incredibly easy as the vast majority of engineers get an offer after going through it.
Experience Rating
Candidates reported having very good feelings for Marvell Technology's ASIC Design Verification Engineer interview process in India.
Marvell Technology Work Experiences
- 5.0good companyASIC Design Verification Engineer • Current EmployeeShanghai, ChinaSeptember 24, 2020Pros: Friendly, open, ramping up, team buildingCons: Salary is not very high, promote is slow
- 5.0Solid technoligy focused companyASIC Design Verification Engineer • Current EmployeeTel Aviv-YafoMarch 24, 2023Pros: Profesional organization & employees. Very good attitude towards engineers, including work environment and personal time.Cons: Same as other "big" companies, sometimes the action comes from above with nothing you can do about it (except complain and talk)
- 4.0Stable, but slightly bureaucraticASIC Design Verification Engineer • Former EmployeeTel Aviv-YafoJanuary 27, 2023Pros: The company has interesting, large, and challenging projects. It is stable. I suggest a partnership.Cons: Slightly bureaucratic, decision making could take time.
