ASIC Verification Engineer Interview Experience - San Jose, California
Process
Applied online. Got call after 1 month. Asked question on resume and question related to basic design, OOPs and System Verilog. The interviewer was friendly and gave some hints to solve the problems.
The interview went for almost 1 hour 15 minutes. Asked to do some coding in System Verilog and C++
Questions
Why is OOPs important?
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Interview Statistics
The following metrics were computed from 2 interview experiences for the Marvell Technology ASIC Verification Engineer role in San Jose, California.
Success Rate
Marvell Technology's interview process for their ASIC Verification Engineer roles in San Jose, California is extremely selective, failing the vast majority of engineers.
Experience Rating
Candidates reported having very good feelings for Marvell Technology's ASIC Verification Engineer interview process in San Jose, California.
Marvell Technology Work Experiences
- 4.0Good projectsASIC Verification Engineer • Former EmployeeTel Aviv-Yafo, IsraelJanuary 22, 2023Pros: Easy to make long-term relations, experienced teams.Cons: Quite slow at decision making, that is common for large companies.
- 4.0what to find in marvelASIC Verification Engineer • Former EmployeeSweden, MaineNovember 13, 2022Pros: Nice people and competitive salaryCons: The slow work process and tight deadlines
- 2.0tips for marvell techASIC Verification Engineer • Current EmployeeStockholm, SwedenAugust 23, 2021Pros: Licence pool is great resources limitlessCons: Don't care about employees money oriented too much
