Good
Good
I had exposure in different technical areas.
There is a lot of process involved.
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Marvell Technology Interview Experiences
Design Verification Intern
Asked questions on projects, SV and basic UVM. One must be good with Verilog and digital too. Make sure to brush up your fundamentals and be good to answer any question on it.
Design Verification Engineer
1.Interview process and panel is friendly and the question asked in the interview completely technical and total 4 rounds of interviews taken. 2.mainly concentrated on the uvm and scenario based questions
Staff DevOps Engineer
The interview process has 3 technical rounds and an HR round. It wasn't more like the usual interviews. It was more of a discussion on the existing work you did before and the skillsets that could be used for the applied position. Everything went gr
Design Verification Intern
Bengaluru, IndiaAugust 3, 2026Asked questions on projects, SV and basic UVM. One must be good with Verilog and digital too. Make sure to brush up your fundamentals and be good to answer any question on it.
Design Verification Engineer
Bengaluru, IndiaMay 1, 20211.Interview process and panel is friendly and the question asked in the interview completely technical and total 4 rounds of interviews taken. 2.mainly concentrated on the uvm and scenario based questions
Staff DevOps Engineer
Bengaluru, IndiaJune 1, 2021The interview process has 3 technical rounds and an HR round. It wasn't more like the usual interviews. It was more of a discussion on the existing work you did before and the skillsets that could be used for the applied position. Everything went gr
