Basic questions on SystemVerilog and Verilog, and basic OOP concepts. UVM concepts like config and factory. Some test bench related questions.
First round was an initial phone screening interview. The second was also the same, but more technical.
Difference between Verilog and SystemVerilog?
Basic interface questions.
The following metrics were computed from 1 interview experience for the Micron Technology Verification Engineer role in United States.
Micron Technology's interview process for their Verification Engineer roles in the United States is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Micron Technology's Verification Engineer interview process in United States.