Taro Logo

Memory Validation Engineer Interview Experience - Santa Clara, California

February 1, 2011
Positive ExperienceNo Offer

Process

5 rounds of interviews in succession, with 45 minutes each. Questions were related to ASIC, Verilog, programming, DFT, verification, etc.

Questions

Memory test related questions

Was this helpful?

Interview Statistics

The following metrics were computed from 3 interview experiences for the Nvidia Memory Validation Engineer role in Santa Clara, California.

Success Rate

0%
Pass Rate

Nvidia's interview process for their Memory Validation Engineer roles in Santa Clara, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive67%
Neutral0%
Negative33%

Candidates reported having very good feelings for Nvidia's Memory Validation Engineer interview process in Santa Clara, California.

Nvidia Work Experiences