1 telephone preliminary interview.
4 rounds of face-to-face technical interviews (no HR round).
All 4 interviews were done in a single day.
Result announced in 2 days.
Interviews included questions on STA, synthesis, RTL coding, and a few aptitude questions.
Each interview was for about an hour.
RTL design questions were related to the AXI protocol, as they were looking for an SoC integration position.
Using a simple logic gate, convert a SET type flip-flop to a RESET type flip-flop.
The following metrics were computed from 2 interview experiences for the Qualcomm ASIC Design Engineer role in Bengaluru, Karnataka.
Qualcomm's interview process for their ASIC Design Engineer roles in Bengaluru, Karnataka is extremely selective, failing the vast majority of engineers.
Candidates reported having mixed feelings for Qualcomm's ASIC Design Engineer interview process in Bengaluru, Karnataka.