Good in pay and benefits
Worst work life management. The Indian team has to struggle a lot getting inputs from SD time. We need to work at odd times.
It was really smooth, and the questions were basic yet tricky. Topics covered were Verilog and digital electronics. One can crack it if they have a strong grip on the basics of Digital IC design, Verilog, and STA. One aptitude question was asked,
Technical Interview: Level 1 and Level 2, each approximately one hour. Level 1 assesses subject knowledge, practical implementation of a project, and designing a new project based on given specifications. Level 2 focuses on knowledge of C.
It consisted of 3 technical interviews. The interviewer was very talented and went into deep concepts. He started from MOSFETs and ended at a full memory chip. The chip tapeout work was useful for the interview.
It was really smooth, and the questions were basic yet tricky. Topics covered were Verilog and digital electronics. One can crack it if they have a strong grip on the basics of Digital IC design, Verilog, and STA. One aptitude question was asked,
Technical Interview: Level 1 and Level 2, each approximately one hour. Level 1 assesses subject knowledge, practical implementation of a project, and designing a new project based on given specifications. Level 2 focuses on knowledge of C.
It consisted of 3 technical interviews. The interviewer was very talented and went into deep concepts. He started from MOSFETs and ended at a full memory chip. The chip tapeout work was useful for the interview.