ASIC Design Engineer Interview Experience - Redmond, Washington
Process
The interview process borders on abuse and is clearly designed to get free work out of applicants. I put 35+ hours into a Verilog design problem that would have taken 4 times that to complete.
Only to have them come back with factually false claims that they found bugs in my solution, which were not actually bugs.
I spoke to absolutely no one with any engineering competence whatsoever.
Questions
They asked me to complete a complex Verilog design, including a testbench covering all conceivable corner cases, and a PowerPoint about it.
It was obviously impossible to complete in the time allowed, so clearly part of the interview is to find out who submits to slave labor without complaint.
Details of the design question are protected by NDA.
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Interview Statistics
The following metrics were computed from 1 interview experience for the SpaceX ASIC Design Engineer role in Redmond, Washington.
Success Rate
SpaceX's interview process for their ASIC Design Engineer roles in Redmond, Washington is extremely selective, failing the vast majority of engineers.
Experience Rating
Candidates reported having very negative feelings for SpaceX's ASIC Design Engineer interview process in Redmond, Washington.
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