There were good people around, and I enjoyed the challenge of the work I had.
There were people who were promoted ahead of time and who could have benefited from closer supervision from above, but did not get it.
More communication with people down the food chain would help. First, it allows issues to be picked up sooner and could help everyone be on the same page.
Then, it might help a different perspective be transmitted up the chain, which is something that seems to be missing at AMD (while I was there).
I applied through my university. The interview was about 1 hour long, mostly technical questions, about Verilog, timing analysis of digital logic and power dissipation. The questions weren't difficult, but the interviewer seemed strangely critical of
2 screening rounds (academic and professional projects, FSM design, SV assertions) on MS Teams. 5 final rounds of interview in 1 day, covering concepts on Verilog, SV, UVM, computer architecture, C++ coding, and logic design.
I was not well prepared. It was a basic Q&A related to my current role and some basic OSI questions. Also, the interviewer was great; he gave me time to understand the question and helped me with hints.
I applied through my university. The interview was about 1 hour long, mostly technical questions, about Verilog, timing analysis of digital logic and power dissipation. The questions weren't difficult, but the interviewer seemed strangely critical of
2 screening rounds (academic and professional projects, FSM design, SV assertions) on MS Teams. 5 final rounds of interview in 1 day, covering concepts on Verilog, SV, UVM, computer architecture, C++ coding, and logic design.
I was not well prepared. It was a basic Q&A related to my current role and some basic OSI questions. Also, the interviewer was great; he gave me time to understand the question and helped me with hints.