EDA VLSI company
EDA VLSI company
Good paying company and full bonus payout
Sometimes work life balance goes awry.
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Cadence Design Systems Interview Experiences
Design and Verification Engineer
There were one telephonic interview and 2 Technical rounds. Technical round related to academic projects and Verilog and digital electronics. 1) Identify the circuit a given FSM corresponds to. 2) Clock generation 3) Blocking vs non-blocking assignm
DSP Engineer
1 hr written test, test involves writing solution of problems. Question were average level but time was very less. There were 3 sections of papers, 1. Programming and software, 2. DSP design 3. Hardware. This followed by 2 technical round and 1 HR r
Applications Engineer
Campus recruitment Step 1: Written test Step 2: Technical interview Step 3: HR round Written test was MCQ, most questions were very easy if you have decent prep. Questions from general aptitude, digital electronics basics, STA basics, Python, Verilog
Design and Verification Engineer
Bengaluru, IndiaSeptember 1, 2018There were one telephonic interview and 2 Technical rounds. Technical round related to academic projects and Verilog and digital electronics. 1) Identify the circuit a given FSM corresponds to. 2) Clock generation 3) Blocking vs non-blocking assignm
DSP Engineer
Bengaluru, IndiaNovember 1, 20151 hr written test, test involves writing solution of problems. Question were average level but time was very less. There were 3 sections of papers, 1. Programming and software, 2. DSP design 3. Hardware. This followed by 2 technical round and 1 HR r
Applications Engineer
Bengaluru, IndiaSeptember 8, 2025Campus recruitment Step 1: Written test Step 2: Technical interview Step 3: HR round Written test was MCQ, most questions were very easy if you have decent prep. Questions from general aptitude, digital electronics basics, STA basics, Python, Verilog
