Great people, great work place, great resources.
Too many management layers that don't represent well with delivery of solutions to the market.
1 screening - 5 onsite rounds. Tested on SystemVerilog. * Write FIFO logic code. * Basics of UVM. * Design questions like counter, FSM, and pipelining. * Verilog questions on execution of the code. * Determine output for a snippet of code in Verilo
Two interviews were conducted: The first was by Zoom. The second, a face-to-face interview, was harder. There were two technical questions: One involved code and the use of a histogram. The second was more about the position and hardware.
They shortlisted some people based on the resumes. I got a call and asked for a preferred time slot. Interview was for 50min long. It was mostly based on programming and operating system.
1 screening - 5 onsite rounds. Tested on SystemVerilog. * Write FIFO logic code. * Basics of UVM. * Design questions like counter, FSM, and pipelining. * Verilog questions on execution of the code. * Determine output for a snippet of code in Verilo
Two interviews were conducted: The first was by Zoom. The second, a face-to-face interview, was harder. There were two technical questions: One involved code and the use of a histogram. The second was more about the position and hardware.
They shortlisted some people based on the resumes. I got a call and asked for a preferred time slot. Interview was for 50min long. It was mostly based on programming and operating system.