Apply online and after several weeks, I got phone interview. It is about ASIC design/verification. My background is more focused on verification of microprocessors, FPGA. Not very familiar with ASIC flow, so it is very important for background match.
ASIC flow, setup/hold, fix violation
The following metrics were computed from 16 interview experiences for the Marvell Technology ASIC Design Engineer role in Santa Clara, California.
Marvell Technology's interview process for their ASIC Design Engineer roles in Santa Clara, California is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for Marvell Technology's ASIC Design Engineer interview process in Santa Clara, California.