Interview had 3 technical rounds. Round 1 - Managerial followed by technical (50 minutes) Round 2 - Technical (1hr 15 min) Round 3 - Technical (1 hr) Round 1 and 2 were based on digital electronics and Verilog. Round 3 along with digital electronics, Verilog also had questions on OOPS, Interrupts, DSA, C++.

Major focus was on basic concepts of everything mentioned above.

1. Basics of digital electronics like combinational gates, mux, flip flops, registers, finite state machines, Verliog/ RTL code.

2. Difference between i) setup and hold time, ii) synchronous and asynchronous rests(explain through verilog coding), iii) mealy and moore iv) tasks and function v) combinational and sequential vi) blocking and non-blocking statements vii) inter and intra statement delay

3. Verilog code for flip flops and finite state machines.

4. Maximum operating frequency of the circuit which had a combo logic between 2 flip flops. (HINT: Setup and hold time equation's based ques)

5. Varying what factor in the equation of setup and hold time can the violation of setup and hold time can be eliminated. (HINT: By varying combo propagation time.)

6. Flip flop conversions, truth tables, a logic implementation through mux, kmaps.

7. ASIC flow diagram, what is netlist, what is RTL.

8. OOPS concepts, sorting algorithms, time complexity.

9. Types of interrupts, what happens when interrupt is called.

10. What is function, what is class. How a class is called.

11. Detecting a sequence through mealy and moore state machines.