HR guidance to the process was on top. There was a long delay of 3 weeks+ to schedule the first round itself.
This was followed by two coding/technical rounds initially. Following which there would be loop interviews, with the HR round at the end.
SV constraints on memory block and region. GLS questions on debug flow.
The following metrics were computed from 1 interview experience for the Meta Design Verification Engineer role in India.
Meta's interview process for their Design Verification Engineer roles in India is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Meta's Design Verification Engineer interview process in India.