There were two rounds.
During the initial phone screen, they shared a codepad and gave me two coding problems.
Had an on-site interview of four rounds. The questions were hard to solve, but the interviewers gave hints.
Confidential.
But related to SystemVerilog and UVM.
The following metrics were computed from 5 interview experiences for the Meta Design Verification Engineer role in United States.
Meta's interview process for their Design Verification Engineer roles in the United States is fairly selective, failing a large portion of engineers who go through it.
Candidates reported having very good feelings for Meta's Design Verification Engineer interview process in United States.