Taro Logo

ASIC Design Engineer Interview Experience

October 20, 2014
Neutral ExperienceNo Offer

Process

ASIC design engineer position.

Interview after job fair, asking questions about circuit design, Boolean equations, setup and hold time, and CMOS working theory.

Latch waveform. It's not too difficult but needs quick responses.

Questions

4-bit counter

Was this helpful?

Interview Statistics

The following metrics were computed from 2 interview experiences for the Sandisk ASIC Design Engineer role in United States.

Success Rate

50%
Pass Rate

Sandisk's interview process for their ASIC Design Engineer roles in the United States is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive50%
Neutral50%
Negative0%

Candidates reported having very good feelings for Sandisk's ASIC Design Engineer interview process in United States.

Sandisk Work Experiences